1. Field of the Invention:
The present invention relates to the provision of an electronic keying check for a microprocessor system to determine if the CPU printed circuit board is correctly operative in each system module and to determine if the correct memory devices are operative with the respective microprocessor CPU printed circuit boards.
2. Description of the Prior Art:
It is known in the prior art to individually decode the ONEs data of a provided input speed command for a transit vehicle and the ZEROs data of that input speed command from the roadway track with a pair of signal channels or cradles, and then to compare the ONEs data with the ZEROs data to detect any discrepancy as disclosed in U.S. Pat. No. 4,015,082 of T. C. Matty et al. and disclosed in above-referenced patent application Ser. No. 496,693, now U.S. Pat. No. 4,558,415, of P. A. Zuber et al.
It is known to provide a signal for each pair of cradles, which determines the operation of a propulsion and brake controller and in addition is fed back for an integrity check operation. An underspeed operation enable signal has been provided by each pair of cradles to determine the operation of the propulsion and brake controller, and in addition was fed back to the integrity check operation of the other pairs of cradles.
A general description of the microprocessors and some of the related peripheral devices as shown in FIGS. 3 and 4 of the drawings is provided in the Intel Component Data Catalog currently available from Intel Corporation, Santa Clara, Calif., 95051.